RF Design-16: Practical Power Amplifier Design – Part 1 — Transcript

Hello and welcome to RF Design Tutorials. This is tutorial 16 on practical power amplifier design. This is a three-part tutorial, and the current video is part one of the three. The remaining two videos will be posted pretty soon on my YouTube channel.

channel now uh objective of this three-part tutorial series is to take you through from a simple device to a finalized power amplifier layout which has been validated for One Tone twotone as well as modulated signal analysis including performing the digital

Now, the objective of this three-part tutorial series is to take you through from a simple device to a finalized power amplifier layout, which has been validated for one-tone, two-tone, as well as modulated signal analysis, including performing the digital predistortion or DPD to obtain the right specs which your PA needs to be used in any kind of wireless communication, whether it is base station, handheld terminal, base PA design, etc.

Channel Once you subscribed don't forget to click on the Bell icon to enable all the notifications and after you watch the video kindly give it a thumbs up and share it with your friends and colleagues who may be interested in

Now, before we start, subscribe to my channel. Once you subscribe, don't forget to click on the bell icon to enable all the notifications. And after you watch the video, kindly give it a thumbs up and share it with your friends and colleagues who may be interested in watching similar tutorials.

started with PA design we will cover these six Topics in sequence by which you will by the end of this tutorial you will have a good source and load importance for this Creed device and then in the second part of video we will

Now, as I talked about, it will be a three-part tutorial series, so here is a quick snapshot of what you can expect in each of the tutorials. In part one, which is this tutorial, we will get started with PA design. We will cover these six topics in sequence by which you will, by the end of this tutorial, have a good source and load importance for this Creed device. And then in the second part of the video, we will start with performing the matching network design in ideal matching network, as well as then converting it to a microstrip-based representation. And then we will optimize the PA for fundamental and harmonic performance, and we will perform the compression and two-tone analysis of the PA. After successful completion of all these validations, we will then proceed to create a layout for the PA and then perform EM circuit co-simulation to do a final validation. Now, the third part of the video will talk about performing modulated signal analysis because in today's wireless world, it is not sufficient to just do one-tone or two-tone based PA validation because the waveforms which we are using today have a very high PAPR, and with a higher peak-to-average ratio compression, it's always good to do a modulated signal analysis to really look and see how the PA will perform in a modulated condition. And we will finish off the third part of this video series of PA design by doing digital pre-distortion simulations inside ADS to see how we can improve the PA linearity to obtain a much better performance so that we can get efficiency as well as a good linear performance out of our PA design. So hopefully, a lot of exciting topics, and like me, you are also excited to go through this journey.

the compression and two-tone analysis of the PA after successful completion of all these validation we will then proceed to create a layout for the PA and then perform em circuit code simulation to do a final validation now third part of the video

All right, so if you're ready to take the deep dive session, nothing is pending. Let's go straight into it. Now, why do we need a power amplifier? Well, power amplifiers are in your transmitting chain of any wireless system, whether it is a base station, mobile phone, or any handheld device. They are the final amplification stage before your signal is transmitted. Therefore, they must produce enough output power to overcome the channel losses between transmitter and receiver to make sure the link works with the best possible quality.

PPR and with with a higher Peak to average ratio compression it's always good to do a modulated signal analysis to really look and and see how the PA will perform in a modulated condition and we will finish off the third part or

Now, PA is typically a primary consumer of power in any transmitter, so a major design requirement on a PA is how efficiently your PA can convert DC power to the output RF power. Now, this efficiency translates either into a lower operation cost if you think about a cellular base station where 50% of your electricity bill might be only due to the PA operation, or in terms of longer battery life for a handheld device such as our mobile phone. We all would love to have longer battery life so that we can work on our phones much, much longer or watch videos and do various things, right?

performance out of our PA design so hopefully lot of exciting topics and uh like me you are also excited uh to go through this journey all right so if you're ready to take the Deep dive session uh nothing is you know pending

PA linearity is another important requirement, and in there, the input and output relationship must be as linear as possible so that we can preserve the signal integrity of our signal. Now, these two often are very conflicting requirements because ideally, you can either have good linearity or good efficiency, and a design of PA often involves a tradeoff of efficiency and linearity.

stage before your signal is transmitted therefore they must produce enough output power to overcome the channel losses between transmitter and receiver to make sure the link works um with the best possible quality now PA is a typically a primary consumer of power in

Now, if you recall my LNA design tutorial video, there the trade-off was between noise figure and the impedance in the input. Similarly, in PA, you have efficiency and linearity, which are our conflicting requirements, but we will see how we tackle all these challenges and still do a pretty good power amplifier design.

base station where 50% of your electricity bill might be only due to the PA operation or in terms of longer battery life for a handheld device such as our mobile phone we all will love to have longer battery life so that we can

Now, in terms of class of operation, I'm assuming all of you already know about the basic theory of power amplifiers, but still, for the sake of completion and making sure we are all in sync, I have a couple of slides here. So typically, class A operation is like what you call as midpoint operation where you bias your transistor device at the midpoint or what we call as IDSS by 2 and have a full 360° conduction. And here, the theoretical efficiency that can be obtained is 50%. However, realistically, you have around 20 to 25%. My apologies.

preserve the signal Integrity of our signal now these two often are very conflicting requirement because ideally you can either have a good linearity or a good efficiency and a design of PA often involves a tradeoff of efficiency and linearity now if you recall my LNA

So in class B, you have a lesser heating problem than class A because in class A you are operating full 360°. In class B, we bias our device at the cutoff point so that you only have 180° conduction. So theoretically, efficiency can reach 78%, but you will have some crossover and distortion problems due to this hard clipping of the PA.

we tackle all these challenges and still do a pretty good um Power Amplifier design now in terms of class of operation I'm I'm assuming all of you already know about the basic theory of uh Power amplifiers but still for the

Now, a more practical class is class AB, which is in between class A and B. That means your device will conduct anywhere between 180° to 360°, depending on the bias point which you select, as shown in this picture here. So in this class of operation, your conversion efficiency can reach somewhere close to 50 to 60 or even 65%, depending upon how good devices and how good design you can perform. And similarly, you have class C, class DF kind of applications, and each one of them has their own pros and cons. Class DF are often called switched mode amplifiers because we intentionally drive the device into saturation like a square wave, so the device operates like a switch instead of operating as a classical transistor.

what we call as idss by 2 and have a full 360° conduction and here the theoretical efficiency can be obtained is as 50% however realistically you have around 50% uh 20 to 25% my apologies so in class B you have

Now, this on-off nonlinear switching makes the conduction angle almost zero, and theoretically, you can have 100% efficiency. In practice, there are many design papers and references which show around 70 to 75% efficiency which can be obtained from class F or inverted class F kind of amplifiers.

have some crossover and Distortion problem uh due to this hard clipping of the PA now more practical class is class AB which is in between Class A and B that means your device will conduct anywhere between 180° to 360° depending

Now, if you want to learn more about these class of operation and how that efficiency is obtained and how you can set up those analysis and simulations in ADS on a device level or on a theoretical level, my colleague Matt Oelas has posted plenty of videos around that topic, and I'm providing this link in the description below this video. Feel free to go and explore. There are a bunch of videos there which are going to be very, very helpful.

design you can you can perform and similarly you have class C uh class DF uh kind of um you know applications and each one of them have their own pros and cons uh class DF are often called a

And apart from these videos, you also have a lot of nonlinear stability analysis, which is another great feature in the new ADS version, whereby if you're doing RFIC or MMIC kind of multi-parallelized kind of amplifier design, they are going to be very helpful, allowing you to do a loop gain-based nonlinear stability analysis. So feel free to explore on your own.

theoretically you can have 100% efficiency in Practical there are many design papers and references which show around 70 to 75% of efficiency which can be obtained from class F or inverted class F kind of amplifiers now uh if you want to learn

Now, any design of a good PA always starts with having a good nonlinear model, and it is the vendor's responsibility to give you a good nonlinear model. Now, you can obtain these models depending on which manufacturer you are using. And in this video, if you want to follow all the steps I have shown here, I have obtained this design kit by registering on Cree's website, and again, I will provide this link in the description box so that you can go and register yourself and get the permission from Cree to download their design kit and use it inside ADS for your work.

posted plenty of um you know videos around that topic and I'm providing this link in the description U below this video feel free to go and explore there are a bunch of videos there which is very going to be very very helpful and

Now, this design kit, apart from having this design kit vendors...

design they are going to be very helpful allowing you to do a loop gain based St nonlinear stability analysis so feel free to explore on your own now any design uh of a good PA always starts with having a good nonlinear model and

it is vendor's responsibility to give you a good nonlinear model now you can obtain these models from depending on which manufacturer you are using and in this video if you want to follow all the steps I have shown here I have obtained

this design kit from by registering on cre website and again I will provide this link in the description box so that you can go and register yourself and uh get the permission from tree to download download their design kit and use it

inside Adas for your work now this design kit apart from having this design kit vendors can also give you data and you know various other formats and in case vendor is not helping you you can have your own nonlinear model

development using tools like keyside IC capap software which is again very very popular tool to do your own device modeling or you can use a measurement based model such as X parameter which can be extracted out of nonlinear Vector

Network analyzer offered by kyite but again depending upon which vendor you work with what's your application you can figure out a way but again the bottom line is you need to have a good nonlinear model to have a good PA design

which is very predictable so that what you simulate is what you are going to see during the measurement now about Gan devices because uh the device I'm going to use from tree is a gan device and Gan devices are very popular these days to

do PA design um mainly because they have much higher power density compared to other Technologies so have having higher power density will allow you to generate more power in a similar amount of area as compared to Gallum arsenide also

those devices have a higher impedence which will make your impedance matching job much easier and they are higher voltage devices which reduce the need to do voltage conversion leading to higher efficiency operations um you know as a company or as a as a project now for

this tutorial I have taken this case study and I'm going to use um a pretty old K device but it's very popular and very well matur device uh CGH 410 and now cre even has a second generation or a newer device for the

same you know kind of um uh specification extending the frequency up to 8 gahz this particular device is U for operation up to uh 6 GHz now we will Target a word design for around 2.4 GHz with plusus 100 MHz uh 10 wat output

power which is 40 dbm and these are the gain and efficiency and efficiency I would like to have more than 50% because I'm going to do a class AB kind of configuration for this um amplifi tutorial ip3 I'm expecting around 45 dbm

or higher right pretty suitable now don't get discouraged if you're doing 5 GHz 10 GHz kind of design all the techniques I'm going to teach you in this three-part tutorial cies are equally applicable irrespective of your frequency so even if you're doing a high

frequency U power amplifier design they still are very very valid now before we jump into you know doing PA design it's always a good idea to go through the data sheet which manufacturer provides you and and while going through the data sheet you know

keep uh looking out for some of these specification because uh some of these will give you the Baseline when you do things like load pull for example so refering to data sheet you will not tentatively wear uh to set your source

and load impedances uh to reduce the iterative effort which you sometime need to do in load P to get to the right point also these data sheets will give you some demonstration uh circuit is schematic and layout out it will give

you some initial idea of possible circuit topology which you can expect or which you can work on however it can completely change based on how you design but again it's still a very very good reference so let's do that let's go

through this data sheet and look at some of the key um you know specifications or key you know figure of Merit now here's the device which I'm using it's a 10 wat device and that's what I'm designing the

amplifier for a DC to 6 GHz it's a gallium nitrate as I talked about now if you look at a small signal gain around the frequency which we are working is around 16 DB which is pretty good and a

13 wat typical saturated power so usually for Gan devices it's like a 3db you know saturated power what they mention 65% efficiency at Pat and usually the vendors will always mention train efficiency not the power added efficiency see so as a designer you need

to distinguish it very very carefully now usual power Amplified specs are written for power added efficiency which will be slightly lower than the drain efficiency and it's recommended for 20 volt oper 28 volt operation which is perfect what we are trying to do and

also in terms of application if you look at it is applicable for Broadband cellular Class A ab and Linear Amplifier suitable for ofdm and that's perfectly what we want because we want to do class AB amplifier design for 5G application

which is typically an ofdm system all right so that's the first thing and then you get your DC uh operating points and DC conditions and here's your typical range for uh the gate um you know bias and I'm going to use minus 2.7 anyways

but we'll figure out uh how did I arrive at minus 2.7 volt not only by looking at the data sheet but actually doing the IV characteristics now let's scroll down and there are various plots of compression gain and and all that but

let me reach to this point so at this you know page here you can see uh vendor is recommending or providing information about the the best possible source and load impedances versus frequency for getting the best possible power but

again uh remember these um imp idence specification are always mentioned with respect to um you know the the bias condition and if you change it bias condition they may not be valid but again it's a good reference or good

reference point so Z Source um around our frequency you know an aggregate magnitude is around 5 ohm and if you look at about load is around 20 ohm or so so that's a pretty good Baseline and this information will be very useful

when we reach u a load uh load pull point so keep take a note of this uh here all right similarly if we go keep going further down you can see a demo board which vendor can also give you and

you see how the PA is mounted and this is how typically how all high power PAs will be assembled so you will have a metal flange and you will Mount this device directly on that flange and now there are two kind of packages which Fe

es available one could be a screw down type package another could be like a solder kind of package but that's pretty popular way of doing the P assembly because you don't want this high power to be consumed on top of PCB uh like how

can we Mount the device for low power or the medium power or LNA uh kind of application and also um you know how do you do this PCB design is very subjective I have seen um you know many

designers they keep the input part of the PCB and output part of the PCB completely separate and they have this flange going all the way down or sometime you can have the single PCB with a cutout for this device mounting

so again it's user Choice uh nothing is good or bad it depends how you would like to you know implement it now if we go to the next page here we can see a picture of a demo amplifier circuit is

schematic and it gives you some basic idea about the kind of decoupling uh they have used uh the input matching and the stability Network and as well as the output matching network uh for the PA now lot of time you don't need to

blindly follow these many capacitors um and all that because usually vendors will always do a Broadband you know kind of board design and they will overcompensate um you know by putting lot of extra things to make sure the

device shows as good performance as as possible but in real application you you really may not need these many bypass capacitors and so on but again that decision is left to designer depending upon how noisy they expect their power

supplies to be and accordingly they can take a call but a good point to to note here uh the lowest um capacitance which is means the higher frequency U will always be closest to your you know transistor the the bigger value or the

biggest value will always be closer to the D so that it can compensate for a low frequency humming which might be you know coming via power supply all right so that gives us some idea initial idea what to expect you can see some cies

resistance here used to stabilize the device although it's pretty big value uh which I would like to avoid personally and then there are a couple of placeholders as zero ohm resistors which which can be used in case it is

necessary and then you have some coupling capacitors here all right so that's good enough information so always keep um you know pay equal attention to the data sheet because as I said you can get a lot of useful information coming

out of this data sheet which serves as a baseline uh for your real circuit design now let's directly jump in to ads here so in ads we um we are going to talk about this part one and I will take you

to all the key steps which I mentioned in the in the OR additional slide here so let me go back to that slide so that we can keep track all right so in part one uh I already provided you about the

introduction and classif operation now let's start with our second step where we are going to perform DCI characteristics and a bias Point analysis for our device now here with this uh template um I already covered all these uh videos how to perform dciv

simulation how to perform stability analysis in my previously posted videos so I'm assuming that you have seen all those tutorial videos already if you have not please go ahead and see those videos first before you continue with this um you know uh topic here because

very difficult to explain all those Basics when we are talking about how to do a power amplifier design right so here the template I have used um can be obtained from insert template and here I have used a fit uh curv Tracer template

which I already talked about in the earlier video so once you have the template you click okay you will have a skeleton something like this available on your schematic and now you can connect your device uh from the library

so here you can see on the left hand side I have install the key uh cre library and how do we install Library uh or window Library into Adas well you can go to design kit manage library and

browse to the location where you have kept the lip. def or where you have unarchived the the library which you obtained from vendor's website right so here all these Basics are already covered but I just gave you a refresher

so here you can see the CGH 400 uh one Z device this is my gate bias from min-2 to minus 4 pretty much like how it was referred in data sheet and here is the drain bias now notice in drain bias I'm

sweeping from 0 to 7 70 volts while this device is only 28 volts so somebody might be wondering why are we going to 70 volt well a good tip always in power amplifier because you are going to plot

the load line and and and those kind of stuff it's always recommended to sweep the train voltage at least two times of your desired operating voltage and I'm going to use 28 volt so ideally I should have gone to 56 volt but anything extra

which you add it's it's more than welcome all right so let's go ahead and perform simulation and now we will have a data display with this template now as I talked about earlier my colleague matelis has those PA videos and I'm

operating you know using one of the templates which is provided in his um you know first session which is Class A ab and B um you know uh tutorial so once I obtain the workspace I'm only using the one of the data display templates

because it has lot of equation already implemented which makes my job easier now here one marker is posted on idss point as you would expect and the based on the second marker you will have voltage and current waveforms the power

dissipation and this table showing you the output power small signal gain large signal gain efficiency uh DC current conduction angle duty cycle all these things are updated now notice uh usually you will obtain this voltage and current waveforms by doing a harmonic balance

simulation but here uh using the equation uh which my colleague has implemented we are able to estimate all those uh from the load line based design equation so they are estimation they are not exactly what harmonic balance will

show show you but it's a very very good and accurate um you know um post processing now based on where you keep keep your you know operating condition with marker two you can see the waveform is changing the conduction angle is

changing and rest of the parameters are changing so if I operate my device on class P um you know where you have conduction angle of 180° you can see the efficiency goes up and here is the power consumption which is only happening due

to this 180° uh conduction of your of your current and it's clipping um in half of the cycle but again so depending upon where you place it for example if I place it in class A configuration you can see conduction angle is 360° and you

have the full 360° current and voltage and then power dissipation is all continuous right so based on my understanding referring to data sheet I have uh selected 28 volt uh operation with minus 2.7 uh es gate voltage which

will um you know approximate it to give me large signal gain of 12 DB and if you remember our spec we wanted gain of more than 10 DB which is pretty good the efficiency is close to 46% as estimated by just simply the DC

analysis but once we do load pull and we find the right um you know Optimum load operating point this efficiency will easily cross over 50% no problem and also the output power predictor is around 36 dbm and again with the right

you know power match impedence matching we would be able to get easily more than 40 uh DPM so it's all in all it's a pretty good operating point where I am expecting to have 256 de of conduction angle which results in around 70% of

duty cycle so that finishes step number one of finding the right DC operating Point uh for your power device now we take that information and we Pro proceed to next step so what's our next step is to perform the stability analysis right

so in a stability analysis uh here I'm using uh instrument kind of look and feel and this kind of component can be obtained uh from going to simulation instrument pallet and here I do have this SP uh Network analyzer or

NWA component which will give you look and feel of network analyzer and you have of input and output to be connected and the bias is inside and you can just set these parameters which you want now internally you know it's just a visual

appeal but internally is the is the same kind of bench which you uh will end up creating yourself you can see there's input termination DC block DC feed and you have V bias 1 V bias 2 and that's

where your device will get connected uh here all right so just for the you know sake of iand or introducing you to a new kind of virtual instrument which you can get in areas so I connected this device

um we will set the same bias which we computed of minus 2.7 volt to 28 volt and I'm going to analyze this device from .5 GHz to 6 GHz which is the maximum frequency recommended now here I'm using some data display templates um

because I don't want to even you know prepare more own graphs or write some equations to to calculate the stability Factor Etc now how can you get access to this uh kind of data display template well if you go to any Simulator for

example as parameter or anything you have this component here called display template if you place this display template component onto schematic you can double click and you can browse to installed templates and under product you will have lot of these preconfigured

templates which you can use and all of them are like data display templates where they will have certain number of plots or equations written already to do your job so from the list available I'm using S21 plot uh network analysis plot

and also the the stability Circle and the you know gain stability circles Etc so see what happens once I have this template and if I perform the simulation I get all these kind of plots and if you refer at the bottom uh here we get

multiple tabs uh depending on the templates I'm using so here one page per template and we can look at the stability circles and you can clearly see your device is not stable at the the 2.4 GHz where my marker is or where my

frequency selector marker is and if I change this marker you will see those stability Circle points change change and it shows you uh what kind of stability performance you have for that device so obviously uh you know till

around 4 gahz you can see I'm less than U you know factor of one with mu load or mu source and if any one of them is greater than one my device will become unconditionally stable and also the role

at stability factor or what you call as K is less than one so clearly our device is not stable at around 2.4 GHz so let me place this marker closer to 2.4 GHz here and you can see the

stability circles are cutting the SM chart now how to stabilize the device again taking Q from the from the data sheet um I knew there is a series resistor which can be placed to stabilize this device now like we

discussed in LNA video where I said don't place any resistive device at the input of the transistor because in case of LNA it affects your noise figure performance it distorts it in case of power amplifier uh try avoiding placing

any resistive component in the output stage or in the drain terminal because that will suck up all the gain which you have obtained by some amount and it's in power stages it's very difficult to obtain gain and anything which you have

obtained you would not like to sacrifice by putting a resistor plus that resistor will need to be of much higher wattage because you're are going to produce a higher power so it's always a good choice to place a resistor at the input

of any power amplification device now with this 5 Ohm resistor if we go ahead and perform simulation now you can see uh my stability factor is greater than one and it's actually greater than two and now the load and and Source

stability circles are are outside the smart that means at around 2.4 GHz my device is unconditionally stable and actually um if you look at here from 1 gahz onwards your device is a Broadband stable so if you have to work in

anywhere in this zone now you can confidently go and design your matching network is already you know kind of stabilized all right so that was step number two so we worked on and stabilized our device at the operator

region we are working at and we only Ed 5 Ohm resistor now when we use 5 Ohm resistor it's not only a you know good idea to only keep looking at stability Factor you need to be also concerned

with how much cane has dropped due to that resistor and here if you look at this parameter performance and if I place a marker around 2.4 gahz I can see I have an unmatched gain of around 11 DP

which is pretty pretty good and it's a small signal gain and once I do impedence matching Etc my gain will be even more and my requirement is anyway to have more than 10 DB gain so that's pretty good so my resistor hasn't

affected too much of my performance but it has a stabilized my device good enough all right so let's go ahead into the next stage of our PA design process and the next stage obviously is to perform a load pull right and I already

posted three videos on load pull please um make sure you watch the load poo videos before you continue here because I'm not going to explain the fundamentals of load p and how do you understand data from load pull now the

template which I'm using here is simply obtained as I demonstrated in tutorial videos by going to design guide load pull one tone load pull and constant available Source power because that's always your getting started load pull now once you bring out this template I

have connected the stabilized device provided the right DC bias as we uh finalized the RF power is 2400 mahz now output power which I'm expecting is 40 TBM and we just noted the gain is around 11 DB or so so the input power I have

decided to feed is 29 dbm now the Z load uh fundamental is kept around 20 ohm and where we got this information from well remember this data sheet there was a page where you had the the source and a load impotance divided

here so I just selected 20 ohm as um you know one of the points and also remember this Z Source fundamental I kept it as 5 ohm so again in this data sheet if you refer to that's the kind of U you know

impedence you looking at so even if you know the vendor is not giving you uh the source impedence information for some reason for any Gan device selecting 5 to 10 ohms is always a good choice and if you are using LD Moss again 5 ohm or so

is kind of good choice there right but more information you can get um from the data sheet is always better now the second and third harmonic of the load I have you know terminated into open circuit or you can decide to terminate

into a short circuit yeah and so that we can look at the fundamental performance there or you can even perform harmonic load pull all those templates are already available uh there but when you are starting with your first um you know

load pull is always good idea to terminate it either in a open circuit or a short circuit now once we go ahead and perform this load pull we can see um The Contours and here um you know uh we can

see we have we are able to achieve more than 40 dbm of power from our device and efficiency which is much higher than 50% so probably it was a good Zone to perform load pull so we already have all

the data here again as we discuss in load pool video you have the condition which is giving you the maximum power as well as cane which is around 12.5 DB and also the operating condition which can give you the maximum pae and these are

the load points where you can vary the marker and see the operating condition pae uh output power and so on now here you have a decision to make because using the load pull which we perform we are able to get uh the desired output

power as well as efficiency so you can either use this um impedence specification of said load and you can see it is also giving you the input impedence so you really don't need to perform a source pull in order to get

you the best gain or to find the right source impedence for your PA Design One template is giving you everything because often I get a query how to do Source pull Etc if you want to do Source P the template is available but Frankly

Speaking you really don't need to unless there is a you know something which is not you know um given to you by this template so again if even if you look at the maximum pae operation which is around 65% yes still able to get very

close to what you're looking at in terms of output power so you can either select this Z load and Z Source combination or you can select this uh Z source and Z load combination and you can proceed for

impedance matching Network design from here but the question is uh is it uh recommended to go directly jump into impedence matching because you are able to operate the output power but right now you don't know how much DB

compression you are operating on you don't know how much IMD uh level you are going to get Etc so again depending upon what you are looking for you can go back to adss schematic and you can utilize the other templates which I also talked

about in the early video so you can sweep the available Source power you can see how much compression level you are working at you can display Contours at a specific xtb compression point and if acpr or evm is your concern you can also

plot Contours of acpr or evm at a specific output power or at a specific xtb gain compression similarly you can even do two-tone uh load pull simulation because if IMD is your Prime concern you can also get IMD Contours if you do two

to on load P but here I'm showing you a way how to how to avoid doing all those and directly utilize the latest available templates to still get your job done before you end up confusing yourself but this fundamental load pull

was very important because we need to make sure we have the right power as well as right efficiency all right so we got this information we got our area where we need to work on now what's the next step to do your PA design or to

progress with your PA design now remember in the last load pull tutorial video I showed you how to use graphical methods of um Computing the recommended load points and then we use those load points into an xdb compression template

and I also provided a knowledge center link for you to download uh the workspaces created by my colleague Andy Howard so I'm using one of those templates which I demonstrated in the last video here I already used the

graphical loot pull uh method because I I knew from my first load pull simulation which zone to look at now I went to that zone selected the area and I exported only those load points and as an MDF file and now I'm going to perform

load pull only on those uhu you know points as necessary which could be a much a smaller zone now for this load pull I have terminated my source idence to the complex conjugate of what we calculated in the earlier uh you know

analysis of load pull because this will give you the maximum gain if you terminate your Source ter you know um Source termination into the complex conjugate of what you obtain from the load pool now input power I'm selecting

as 28 dbm and 3db is my target operating range rest of the parameters is already set now as we we discussed we can start optimization and now this template will make sure all the Contours all the data shown to you in the load pool only

belongs to around 3db compression characteristics so it will filter out everything which is highly compressed or which is under compressed it is only going to give me the details which are relevant for me to get to a 3db

compression point now if you're looking to do 1db compression Point based design feel free to change it to one and then you can still use the same template as it is there is no change there but typically in G amplifiers we we talk

about 3dp you know kind of gain compression value so this will take few seconds for uh for the simulation to run but again as you can see I have simply inserted uh my cre device along with my stability resistor and nothing else has

to be changed so it's like just drop in your device um you know set up some key parameters and you hit the optimization button and let ads do your job so now the simulation is finished now I will

have a data display showing me the the right format of data or the value which I'm really interested in so here in the center you can see the Contours belonging to 3db operating condition of this device here is the efficiency and

here is the various power levels of various Contours and also gain you can see is around 13 TB which is which is kind of pretty good uh obtain now the final information is simply contained in the tables uh which are shown here the

red one is showing you the maximum pae operation and the blue one showing you power delivery again I already discuss all of this in the previous load poool tutorials so take away from me here again for a 3db operation where I'm

getting more than 40 dbm power and efficiency of around 57% this is my Zed load which I need to design impedance matching for and this is the Z in for which I need to do the input in input impedence matching

Network and again if you want to go behind highest deficiency which is 66% and even you go behind it you can see you are still able to operate you know get more than 40 DB M so these are

your impedence matching um you know targets and again both of them are pretty close so there is nothing more so which is a good sign that this device will give me the best possible efficiency with the best possible output

power and I would be able to meet my design requirements by a by a good amount and also the large signal gain is is more than 12 DB against my target of 10 DB which is again a good news for me

so all in all pretty good so I got my load impedence as well as Source impedence uh from this analysis now what do we need to do next what are you going to do next well the next requirement of

course is to do impedence matching now before we go into impedence matching which actually will lead us to the second part of this video or second tutorial which I will post in next few days before we go there just one final

step which I always like to do is to create this kind of schematic where I check my impedence matching requirement and I perform harmonic balance simulation as well as as parameter simulation just to get a sense of how a perfectly matched power

amplifier would look like for me all right so in this case rest everything is still the same I have the same um RF frequency you know bias condition input power is set as per what we just now from load pull and notice these two

variables here Zs is set to the complex conjugate of what we just obtained always remember that whatever load pull gives you you need to do a complex conjugate of this and use that number in your Source termination the load

termination has to be used as it is you don't need to take a complex conjugate of this so once we have these variables set but before we assign those numbers to these termination I just want to see in a 50 ohm operation how my PA will

perform and here I do have bunch of um equations Computing my power delivered in Watts power delivered in dbm the input power the DC power then I'm commuting the power added efficiency as well as I'm Computing the train

efficiency so that we can match that efficiency number from the data sheet if required and then based on power delivered and power available using these equation I will be able to do a large signal gain um you know

calculation so instead of relying on graphs Etc I have written this equation and again these equations are available as a part of template or you could simply write it yourself now IL load V load all these are name of these nodes

you can see there is a current probe here and all of these have been named properly so if you try to replicate this kind of template or equation on your side make sure you modify my equation based on the names which you're using at

your side all right okay so let's go ahead and see how this device operates in a 50 ohm now here is the output power Spectrum you can see the output you know power on this graph is around 38 TBM and

same thing is predicted by my equation for for now and then you have a power added deficiency which is around 40% now remember the first DC analysis we did this is what DC analysis predicted around 36% uh or something like that efficiency

and that is what we are getting the drain efficiency obviously is slightly higher large signal gain is around 9 DB in power output in wats is around 6.3 DP and these are your small signal gain and small small signal uh input and output

matching and these two are current waveforms uh the VDS SII now uh remember we talked about intrinsic voltage and current information now depending upon which device vendor uh device you are using when you simulate as a part of

data set uh they will um you know also give you some things like IDI which is intrinsic drain current and also also the voltage which is vdsi which is intrinsic gate voltage so if you want to plot the dynamic load

line Etc you should be using these voltages rather than you know uh plotting the dynamic load line Etc using this voltage and this current because vdsi and IDI shows you how is the voltage in current inside this device

right at the train terminal of your gallium nitrate transistor so they show you the true picture of how much your fet is conducting because anything which you get at outside at the load termination point is you know when your

signal has already transitioned through package and and you know some of those parasitics are already included but intrinsic voltage and current gives you exactly what's happening at the terminal of a gate so imagine you open the fet and put a probe right at the train

terminal of your device so this is very very useful you should look at it now so that was 50 ohm operation of course we expect that now let's change this to ZL which is what we obtained from load

poool and complex conjugate of the source impedence now this is you know creating a condition where your amplifier is perfectly matched for fundamental frequency not for the harmonic frequency yet it is only a fundamental frequency so your harmonics

will also see the same terminations which is not Optimum remember in load pull you set it to either open circuit or short circuit here your harmonics are also going to see the same Source frequency same load frequency so let's

see what happens so we'll go ahead and analyze this and I'll look at the table there so output power as predicted by loot pull is you know around 41 or higher dbm efficiency is around 56% % drain efficiency is 60% which is very

close to what was mentioned in the data sheet of of the device here if you go to the first page so we are we are able to operate pretty close to what has been you know um showed to us in data sheet

pretty good the last signal gain is around 12.5 DB this is what exactly our load pull was saying and output power delivered is around 13 watt and this is what your data sheet also talks about 13 watt of typical pad right so all in all

everything is falling into place pretty nicely now here is the difference so don't confuse yourself when you look at this spectral plot and if you put a marker there it is reading 38.7 dbm power whereas this is showing 41 dbm so

what's the difference between two now when you use dbm function in these plots it is always referring to 50 ohm as a reference impedence to do your power computation however if you remember the P delivered um you know equation here it

is it is reading your instantaneous node voltage and the current and that is based on the ZL specification so that's normalized or calculated as per this impedence not the 50 ohm and you know this impedence is not 50 ohm because

this is 28 + j.5 all right so there'll be always well you know this kind of discrepancy unless you un normalize this dbm calculation to the load impedence which you are using so be mindful of that and don't end up

confusing yourself right so here is the the voltage and current you know profile after you terminate the device into nice matching condition which you are looking for and here is your gain small signal gain which is going to be around 15.6 TB

and if you go back to data sheet this is what roughly we are estimating around 2 GHz so it's a perfectly matching condition and the output match not so great because we went for power match remember we haven't gone for

simultaneous conjugate match we have gone to mash the device to the best possible uh you know power uh condition and again this is a small signal match this is not a large signal match but looking at this power we can confidently

say it's a good large signal match because we are able to extract the maximum power and you know maximum power can only be delivered if you do a complex conjugate match but that is large signal matching not a small signal

what you call as um you know s22 and there are templates available inside areas to do large signal S11 large signal s22 if you want to do that but for now I'm only doing things which are shown to you in data sheet and they

always show you small signal matching conditions here all right so going back uh to our you know agenda for this part of tutorial we covered we went through the PA introduction classes of operation dciv and bias Point analysis we looked

at a stability analysis performed the initial load pull and then we went ahead and perform a 3db based load pull to finalize our right source and load impedence and finally did a validation of source and load impedence which we

found in Step number five in a in a PA operating mode and make sure if we do the right impedence matching we will get all the design specification as we are looking at and that would lead us to

part two of this video where we will continue this learning and we will Design the input and output matching Network and there are plenty of good tips and tricks which you need to know by for doing a right matching Network

design for PA amplifier you know PA kind of operation and we are going to talk about that in part two video and then we will finalize the PA by optimizing it and doing a layout in Emco simulation so

that's all for this video hope you thoroughly enjoyed the content presented in this tutorial and I look forward to see you in part two of this tutorial series have a great time designing and wish you all the best in your design

work my friends