**Apple Just Did What the Chip Industry Said Was IMPOSSIBLE! — Transcript & Summary | SozAI**
Source: https://sozai.app/transcript/apple-chip-breakthrough-impossible/

Apple's 2nm M6 chip debuts in the $899 Mac mini, breaking its iPhone-first tradition, while the M5 Ultra fuses four chips into one processor.

## Key Takeaways

- Apple's 2nm chip debut in a low-cost desktop is a deliberate risk-managed way to validate a new manufacturing process.
- Gate-all-around nanosheet transistors were the necessary fix for leakage at the smallest scales.
- Node names are branding; real performance claims need independent testing.
- Advanced packaging like the M5 Ultra's multi-die design is a parallel path to performance gains when shrinking stalls.

## What the video covers

- Apple shipped its first 2nm-process chip, the M6, in a redesigned $899 Mac mini instead of an iPhone, breaking a decade-long pattern.
- The 2nm process moves transistors from FinFET to gate-all-around nanosheet designs to stop current leakage that wastes power as heat.
- TSMC reached full volume production of the new process in Q4 2025, with reported yields climbing toward 70% working chips.
- The M6 uses a three-tier core layout (2 super cores, 4 performance, 6 efficiency) and adds a dedicated AI accelerator to every graphics core.
- TSMC's published figures claim 10-15% more performance at the same power, or up to 30% less power at the same performance, versus the prior generation.
- Node names like '2nm' are marketing labels and do not correspond to any physical measurement on the chip.
- Apple reportedly reserved more than half of TSMC's first year of 2nm capacity at roughly $30,000 per wafer.
- The M5 Ultra connects four 3nm silicon dies via advanced packaging to act as a single processor, aimed at large AI workloads.
- The video argues the industry has split into two strategies: continued transistor shrinking and reducing the distance between chips through packaging.
- Independent benchmarks are needed to separate gains from the shrink itself versus Apple's simultaneous architectural changes.

## Chapters

1. 00:00 The Impossible 2nm Chip
2. 01:28 Why Transistors Leak and the Gate-All-Around Fix
3. 04:47 Why Apple Chose the Mac mini
4. 07:26 Inside the M6: Cores, Specs, and Real Gains
5. 09:39 The Cost of 2nm Wafers and Supply Race
6. 13:19 Four Chips Fused: The M5 Ultra Packaging
7. 18:42 Two Strategies for Future Chip Progress
8. 25:25 Conclusion: Shrinking Versus Closing the Distance

Answers

## Questions about this video

Why did Apple put its 2nm chip in the Mac mini instead of the iPhone?

According to the video, the Mac mini is a lower-risk product to shake out a new process before using it in something Apple cannot afford to get wrong. Early wafers are costly and low-yield, so starting with a lower-volume desktop limits exposure.

What is a gate-all-around transistor?

It is a transistor design where the gate wraps fully around the silicon channel on all four sides, instead of three as in FinFETs. This closes off the leakage path that appeared as transistors shrank, using stacked horizontal nanosheets.

Does the 2nm label mean the chip's features are 2 nanometers wide?

No. The video explains that node names stopped describing physical dimensions over a decade ago and are now marketing labels for a manufacturing generation. The chip's real gains come from the process improvements, not a literal 2nm measurement.

## Full Transcript — Download SRT & Markdown

00:00

Speaker A

A silicon atom is about 2 tenths of a nanometer wide. So, when Apple says it shipped a 2 nanometer chip, it is saying the switches inside are roughly 10 atoms across. And for 20 years, the smartest people in the chip business said hitting that mark on schedule was close to impossible.

00:17

Speaker A

Then, on a quiet Tuesday in August, Apple dropped that chip into an $899 Mac mini, and barely anyone looked up. That is the strange part. The biggest leap in Apple's chip history did not arrive with fireworks on a stage. It arrived in a press release, buried under specs most people scrolled right past.

00:34

Speaker A

And there were actually two breakthroughs hiding in that same week, not one. The second was a chip called the M5 Ultra, built by welding four separate pieces of silicon into something that acts like a single processor. So, why did Apple put its hardest, most expensive technology inside its cheapest computer instead of the iPhone? And how do you fuse four chips together so completely that software cannot tell them apart?

00:43

Speaker A

To understand either answer, you have to start with a tiny switch that would not stop leaking.

00:59

Speaker A

The switch that kept leaking. That leaking switch is a transistor. And for about 15 years, every chip on the planet used the same shape of it.

01:11

Speaker A

Engineers called it a FinFET. Think of a thin vertical blade of silicon standing up off the wafer, with a gate wrapped around three of its four sides, acting like a hand squeezing a garden hose to control the flow of electricity. That design carried the world from the first real smartphones all the way up to supercomputers.

01:18

Speaker A

Billions of these blades sit on a single chip, and for a long time shrinking them was the easiest money in technology.

01:28

Speaker A

Then the blades got too small, and the fourth side started to matter. Electricity began slipping through the one face the gate could not reach.

01:44

Speaker A

A transistor is supposed to be fully off when you tell it to be off, but these ones kept dribbling current even when switched off, which wastes power and turns it straight into heat. On a chip with tens of billions of switches, a tiny leak in each one adds up to a furnace in your lap. Engineers had the fix written down more than 10 years ago. Stop wrapping the gate around three sides, and wrap it all the way around. All four faces, no gaps, nowhere for the current to escape. They called it gate all around, and the new shape it needs is a nanosheet transistor.

01:50

Speaker A

Instead of one vertical blade, you build flat horizontal ribbons of silicon stacked on top of each other like pancakes, and you thread gate material through every gap so each ribbon is completely surrounded. On paper, it is elegant. In a factory, it is brutal.

01:58

Speaker A

Here is the scale of the brutality. Building one of these in a lab is a good afternoon's work for a research team.

02:08

Speaker A

Building billions of them identically across a wafer the size of a dinner plate with few enough mistakes that you can actually sell the result is a completely different mountain. Ask around the industry 5 years ago, and you would get three answers.

02:23

Speaker A

Some said the switch was 3 years out. Some said five. Plenty of experienced people quietly said it might not be climbable at all with the tools that existed. TSMC, the Taiwanese company that builds chips for almost everybody who matters, said it would be in full volume production in the final quarter of 2025. It hit that date. Early reports put the share of working chips climbing towards 70%, which at the start of the decade would have sounded like wishful thinking. For context, when a brand new process is young, a lot of the silicon coming off the line is simply garbage.

02:38

Speaker A

And 70% good means the economics actually work. Quick pause before we go further. Stories like this take days to research and check. So, if it is earning your time, a like genuinely helps. And subscribing means you will be here for the next one. Now, back to the strangest decision in this whole story. Because once that production line was running, everyone expected the first chip off it to land in an iPhone.

02:47

Speaker A

That is what Apple has done at every single one of these transitions for a decade. And there is a very good reason for it.

03:05

Speaker A

This time Apple did the opposite. And the chip went into a computer that costs less than a phone.

03:13

Speaker A

A $899 desktop gets the crown jewel. The reason Apple always starts with the iPhone comes down to raw volume.

03:30

Speaker A

A new iPhone sells in the hundreds of millions. And only a product that big can absorb the earliest, priciest, least reliable wafers coming off a brand new line. You need enormous orders to make the math survive. That pattern held for 10 straight years, and then it did not. The first chip built on the new 2-nanometer process went into the cheapest desktop Apple sells.

03:47

Speaker A

It is called the M6, and it showed up inside a redesigned Mac mini in August at $899.

04:04

Speaker A

Read the spec sheet, and it looks almost boring. A 12-core processor, a neural engine with 16 cores, double the previous count. Memory bandwidth up 10%.

04:09

Speaker A

None of those lines would stop you mid-scroll. Look closer at how those 12 cores are arranged, and it gets more interesting.

04:26

Speaker A

Apple split them into three tiers instead of the usual two. There are two heavyweight super cores for the hardest single jobs, four performance cores for the heavy lifting, and six efficiency cores for everything quiet and background. Apple had never used a three-tier layout in a mainstream desktop chip before. On top of that, every single graphics core got its own dedicated AI accelerator built into it. Also a first for this product line.

04:38

Speaker A

The foundation under all of it is where the real story sits. By TSMC's own published figures, the new process delivers somewhere between 10 and 15% more performance at the same power draw compared to the generation before it. Flip that around, and you can instead take up to 30% less power at the same performance. Logic circuits pack in up to 20% tighter. For a mature industry, those are not small numbers. They are roughly what the whole field used to expect every single generation back when progress felt automatic. And getting them now meant tearing out an architecture the world had leaned on since the 2010s while still shipping hundreds of millions of chips a year without a stumble.

04:46

Speaker A

There is a catch in crediting all of that to the shrink, and it is worth being honest about.

04:53

Speaker A

Apple changed several things at once. It moved to the new process, added two more processor cores, invented that three-tier layout, and bolted AI hardware onto every graphics core.

05:03

Speaker A

Untangling how much of the speed comes from smaller transistors versus smarter design is not something anyone can do by reading a spec sheet. It needs independent side-by-side testing, and that only arrives weeks or months after real customers have the machines in their hands. It is also worth knowing that the name itself is a label, not a measurement.

05:20

Speaker A

Node names stopped describing any physical thing on the chip well over 10 years ago. There is no shared industry ruler behind them.

05:30

Speaker A

TSMC's old 7 nanometer chips once matched the density of Intel's 10 nanometer chips, despite the very different numbers on the box. When Apple says 2 nanometer, it is telling you which manufacturing generation built the chip, not the size of anything inside it. The gains are real. The number is branding. So, why hand the crown jewel to a desktop that sells in modest numbers?

05:39

Speaker A

Part of the answer is that the Mac mini is a low-risk place to shake out a new process before it goes into something Apple cannot afford to get wrong.

05:52

Speaker A

The other part of the answer is money, and it is a staggering amount of it.

06:00

Speaker A

Each of these wafers reportedly costs close to $30,000, and Apple did not politely wait its turn in the queue.

06:17

Speaker A

Buying up half the line. Apple did not wait in line at all, according to multiple supply chain reports. The company locked up more than half of TSMC's entire first year of 2 nanometer capacity. Not a slice, not a generous allocation. The majority of the most advanced manufacturing capability that

06:30

Speaker A

The foundation under all of it is where the real story sits. By TSMC's own published figures, the new process delivers somewhere between 10 and 15% more performance at the same power draw compared to the generation before it. Flip that around, and you can

06:48

Speaker A

instead take up to 30% less power at the same performance. Logic circuits pack in up to 20% tighter. For a mature industry, those are not small numbers. They are roughly what the whole field used to expect every single generation back when

07:06

Speaker A

progress felt automatic. And getting them now meant tearing out an architecture the world had leaned on since the 2010s while still shipping hundreds of millions of chips a year without a stumble.

07:19

Speaker A

There is a catch in crediting all of that to the shrink, and it is worth being honest about.

07:25

Speaker A

Apple changed several things at once. It moved to the new process, added two more processor cores, invented that three-tier layout, and bolted AI hardware onto every graphics core.

07:39

Speaker A

Untangling how much of the speed comes from smaller transistors versus smarter design is not something anyone can do by reading a spec sheet. It needs independent side-by-side testing, and that only arrives weeks or months after real customers have the machines in

07:57

Speaker A

their hands. It is also worth knowing that the name itself is a label, not a measurement.

08:04

Speaker A

Node names stopped describing any physical thing on the chip well over 10 years ago. There is no shared industry ruler behind them.

08:13

Speaker A

TSMC's old 7 nanometer chips once matched the density of Intel's 10 nanometer chips, despite the very different numbers on the box. When Apple says 2 nanometer, it is telling you which manufacturing generation built the chip, not the size of anything inside

08:31

Speaker A

it. The gains are real. The number is branding. So, why hand the crown jewel to a desktop that sells in modest numbers?

08:40

Speaker A

Part of the answer is that the Mac mini is a low-risk place to shake out a new process before it goes into something Apple cannot afford to get wrong.

08:50

Speaker A

The other part of the answer is money, and it is a staggering amount of it.

08:55

Speaker A

Each of these wafers reportedly costs close to $30,000, and Apple did not politely wait its turn in the queue.

09:03

Speaker A

Buying up half the line. Apple did not wait in line at all, according to multiple supply chain reports. The company locked up more than half of TSMC's entire first year of 2 nanometer capacity. Not a slice, not a

09:19

Speaker A

generous allocation. The majority of the most advanced manufacturing capability that exists on Earth, reserved in advance by a single customer.

09:29

Speaker A

That booking covers more than the M6. It also covers the next generation of iPhone chips, including the A20 expected in this year's flagship phone and the silicon for Apple's next mixed reality headset. So, the Mac Mini was never the

09:44

Speaker A

destination. It was the test track. The same process that quietly launched in a $899 desktop is already earmarked for the product line Apple can least afford to fumble, which means any growing pains in this first wave will not stay in a

10:01

Speaker A

niche machine for long. They will show up at global scale. At roughly $30,000 a wafer, that reservation is an enormous check. A wafer is the big silicon disk that gets sliced into individual chips, and on an older process it might cost a

10:19

Speaker A

fraction of that. Paying that premium across more than half a year's output is not a company hedging. It is a company spending extraordinary money to make sure everyone else has to wait. And everyone else did. Qualcomm, which makes

10:35

Speaker A

the Snapdragon chips inside most of the world's Android phones, was reportedly left waiting for broad access to the same line, with some estimates putting meaningful volume well into the following year. AMD, Nvidia, and MediaTek all wanted pieces of the same

10:53

Speaker A

scarce supply, and Nvidia and AMD wanted badly. Because the same wafers feed the data center chips driving the entire AI boom. When one buyer holds the majority of a scarce cutting-edge resource, everybody downstream feels it. Sometimes that looks like shipping delays.

11:12

Speaker A

Sometimes it looks like higher component prices. Sometimes it looks like a product quietly sliding to next year with no explanation.

11:21

Speaker A

This is not a new move, either. Apple ran a smaller version of the same playbook when the 3 nanometer process first opened up, and it worked well enough that the company simply scaled it up for the harder, pricier jump to 2

11:36

Speaker A

nanometer. So, Apple did not only get there first, Apple got there in a way that made following quickly structurally difficult for anyone else.

11:45

Speaker A

It is also worth saying plainly that none of the companies waiting are short on talented engineers. Intel is in a genuinely tough fight trying to prove its own advanced manufacturing can compete again after years of watching TSMC pull ahead, and it was absent from

12:03

Speaker A

TSMC's earliest 2 nanometer customer list entirely. Samsung is running its own gate-all-around program with its own yield struggles and its own customers watching to see if it can match TSMC's numbers.

12:17

Speaker A

The reason only one or two companies summit first is that moving an entire high-volume factory onto a brand new transistor shape is a mountain with very little room at the top. And TSMC had Apple's money and order book pushing it

12:33

Speaker A

up the slope. There is a bill waiting at the end of this, too. $30,000 wafers do not just evaporate inside a balance sheet. Early industry reporting has already raised the possibility of real price increases on the next generation of iPhones once this

12:50

Speaker A

process moves from a desktop that sells in the low millions into a phone that sells in the hundreds of millions.

12:57

Speaker A

Building the most advanced chip on Earth is one achievement. Building it cheap enough and reliable enough for a phone at that volume is a separate and arguably harder one. And all of that was only half of what Apple announced that

13:12

Speaker A

week. The other chip, the flagship one, is not built on the new process at all.

13:19

Speaker A

Four chips wearing one costume. The M5 Ultra, Apple's new flagship, sits on the older 3-nanometer process. No new transistor shape, no exotic node, none of the stuff everyone was arguing about.

13:36

Speaker A

It's breakthrough lives in a completely different place. How you connect enormous slabs of silicon so they stop behaving like separate chips and start behaving like one.

13:48

Speaker A

To see why that even matters, you have to drop the mental image of a chip as a flat gray slab. Inside, it looks more like a dense city. Billions of components wired together across a stack of more than a dozen metal layers, and

14:03

Speaker A

every signal that travels from one neighborhood to another has to physically cross real ground. That distance is not free.

14:12

Speaker A

The wires fight the current flowing through them, and they also act like tiny batteries that have to charge and drain every time a single bit moves.

14:22

Speaker A

The longer the wire, the worse both problems get. Across a whole chip, those losses become a genuine tax on speed and on battery life, and shaving it down is what chip designers spend entire careers on.

14:37

Speaker A

For years, the industry's answer to needing more muscle was simple and a bit crude. Put two chips next to each other and let them chat over a connector.

14:47

Speaker A

The trouble is that the connector is slow compared to the distances inside a chip, so the two halves feel like two computers sharing a desk and constantly interrupting each other.

14:58

Speaker A

Apple's answer to that arrived in 2022 with the M1 Ultra using a technology called Ultra Fusion. Instead of a connector, Apple etched a dense mesh of connections directly into the silicon, linking two chips side by side and moving data between them at roughly 2

15:18

Speaker A

and 1/2 terabytes per second. For a consumer product, that was a wild amount of bandwidth. It was enough that the two separate pieces could convincingly pretend to be one processor sharing one pool of memory. For 3 years, two pieces

15:35

Speaker A

fused together was the ceiling for Apple and honestly for most of the industry at real volume. The M5 Ultra doubles that ceiling by fusing four pieces instead of two.

15:47

Speaker A

Apple takes two M5 Max chips, each of which is already two smaller pieces bonded together, and bonds that pair again into a single quad piece processor using a new generation of UltraFusion.

16:01

Speaker A

Bandwidth across those seams now tops 4.4 terabytes per second, nearly double the original, with connection density more than six times higher than before.

16:12

Speaker A

That is what lets 36 processor cores and up to 80 graphics cores behave as though they all live on one continuous sheet of silicon instead of four chips negotiating awkwardly across a border.

16:25

Speaker A

Here is why the density number matters more than the bandwidth headline. Every time engineers push a bonding technology to tighter spacing, they are fighting that exact same distance problem just at a bigger scale. Do it badly and four

16:41

Speaker A

pieces trip over each other's memory requests and burn power purely on coordination. Do it well and the seam vanishes as far as software is concerned. A program running on the M5 Ultra has no idea it is spread across

16:57

Speaker A

four physical slabs of silicon and it does not need to. It just sees one giant pool of memory and one giant block of compute. That is the actual feat hiding behind the phrase quad die architecture.

17:12

Speaker A

And it is the size of that memory pool, not the core count, that makes this chip genuinely unlike anything Apple has shipped.

17:21

Speaker A

Half a terabyte all in one place. The pool goes up to 512 gigabytes of unified memory moving at 1.2 terabytes per second, a 50% bandwidth jump over the previous Ultra class chip.

17:37

Speaker A

That is the number the whole quad piece design exists to make possible because memory that large is useless if the four slabs cannot reach it fast enough to make it feel local.

17:49

Speaker A

To understand the scale, think about what it takes to run a very large AI model today. A frontier class model with hundreds of billions of parameters normally needs either a rack of specialized data center hardware or a slow stuttering process where the

18:06

Speaker A

machine loads one chunk of the model into a small pool of fast memory, does some work, throws it out, and loads the next chunk. That swapping is the bottleneck. It is like trying to read a 1,000 page book through a window that

18:22

Speaker A

only shows you two pages at a time. Apple's pitch is that one desktop can now hold a model of roughly 400 billion parameters entirely in memory at once.

18:33

Speaker A

No cloud round trip, no swapping. The model just sits there whole and the chip reads from any part of it instantly.

18:42

Speaker A

A couple of years ago, that was the size that defined the absolute frontier of the field and it lived in data centers.

18:50

Speaker A

That is a genuinely new claim for a machine that fits on a desk and it is only credible because the connections between the four pieces are fast enough to make all that memory feel like one block instead of four fragments.

19:04

Speaker A

It is tempting to lump the two announcements together as one unified leap and that is exactly the mistake worth avoiding.

19:12

Speaker A

These were two different bets on two different problems. The M6 got the exotic new manufacturing process and kept a familiar single-piece design.

19:22

Speaker A

The M5 Ultra kept the familiar process and got the exotic new packaging. They shipped four weeks apart from the same company aimed at two halves of the same underlying question. How do you keep making chips meaningfully faster when

19:39

Speaker A

the easy gains from shrinking transistors start drying up? That question is not Apple's alone and it is worth knowing how deep it runs.

19:49

Speaker A

For 60 years, the recipe behind computing progress was simple. Make the switch smaller, fit more in the same space, performance goes up, cost per switch goes down.

20:02

Speaker A

That recipe produced one of the great sustained runs in engineering history carrying us from a few thousand transistors on a chip in the 1970s to hundreds of billions today.

20:14

Speaker A

It was never a law of physics despite the name Moore's law. It was an observation by an Intel co-founder that the whole industry then organized itself around like weather you could schedule.

20:27

Speaker A

Then the doubling started showing up late, smaller and vastly more expensive to engineer. Nobody announced it. The industry just quietly began hunting for performance in other places.

20:39

Speaker A

A single leading-edge chip factory now costs somewhere around $20 billion before one chip rolls out the door and each new generation delivers a smaller jump than the last for more money.

20:52

Speaker A

So the field split into two strategies and Apple's August announcement is a rare case of one company chasing both in public in the same month. The first strategy is the old one, keep shrinking no matter how hard the physics gets.

21:08

Speaker A

The second accepts that shrinking alone will not carry the load anymore and goes after the other great waster of time and energy.

21:17

Speaker A

The distance a signal has to travel. By fusing pieces of silicon so tightly together that the gap stops mattering.

21:26

Speaker A

Most companies pick one lane and commit. Apple had the balance sheet and the design talent to run both experiments at once and the rest of the industry is arriving at the same fork from very different directions.

21:40

Speaker A

Two roads out of a slowing curve. Those different directions are more interesting than a simple race because the companies arriving at the same conclusion have almost nothing else in common. AMD already stacks memory directly on top of its processors using

21:58

Speaker A

its own bonding technology though with spacing several times looser than the most aggressive stacking plans being drawn up. Intel and TSMC both have multi-year road maps for three-dimensional chip packaging and chip makers working under far harsher limits cut off from the most advanced

22:17

Speaker A

machines for printing circuits have landed on nearly the same idea from the opposite side. They stack and fold their logic vertically precisely because they cannot buy the equipment to keep shrinking the traditional way.

22:30

Speaker A

Different budgets, different constraints, same insight keeps surfacing. If you cannot make things smaller fast enough anymore, make the distance between them disappear instead.

22:42

Speaker A

None of this is risk-free and the near future here is genuinely uncertain rather than settled. TSMC has already confirmed that this first wave of 2 nanometer chips does not include a feature the industry nicknames the super power rail. The proper name is backside

23:01

Speaker A

power delivery and the idea is to move the power wiring to the back of the wafer, so the front side has more room for signal wiring. It frees up space and cuts waste. That refinement is being held for a later version of the node and

23:16

Speaker A

the generation after it, expected across the back half of this year and into next.

23:22

Speaker A

There is also a cost line even TSMC is refusing to cross. Company leadership has publicly pushed back on adopting the newest generation of the enormous machines that print circuit patterns onto wafers, pointing at a price north of 350 million euros

23:40

Speaker A

per machine as too expensive to justify yet. One machine, think about that for a second. The company furthest ahead in this entire race is still carefully choosing which impossible thing to attempt next and which one to wait out.

23:57

Speaker A

And the line does not stop moving once this generation ships. TSMC has already sketched what comes after the version Apple is using, including that refined variant arriving within the year and a further node beyond it that the industry discusses by

24:14

Speaker A

its angstrom scale name. Every one of those future steps will get framed by someone as the next impossible thing.

24:22

Speaker A

Some will land close to on schedule, the way this one mostly did. Others will slip a year or two, the way plenty of earlier transitions have.

24:32

Speaker A

So, where does that leave the claim that Apple built what everyone said could not be built? The honest answer is more interesting than yes or no. Moving an entire manufacturing line from the old blade-shaped transistor to gate-all-around on time at yields good

24:49

Speaker A

enough to sell was genuinely treated as one of the hardest things the chip industry had faced in over a decade.

24:56

Speaker A

TSMC pulled it off close enough to its original timeline that skeptics inside the field have had to quietly revise their expectations.

25:06

Speaker A

And fusing four pieces of silicon into something that behaves like one continuous processor at that bandwidth and that density is a real step past anything a consumer chip had shipped before.

25:19

Speaker A

Both things happened. Neither happened in a vacuum and neither is a finish line. What really took place in August was a company placing two enormous expensive bets on two different answers to the same slowing curve and having both land close enough to on schedule

25:37

Speaker A

that everyone else is still catching their breath. The transistors got smaller exactly like the old recipe demanded. The distance between chips got smaller too in a way the old recipe never planned for.

25:51

Speaker A

Somewhere between those two bets sits the next decade of how fast your devices get faster and whether the number printed on the box means anything is almost beside the point. The real story was never the width of a switch. It was

26:06

Speaker A

always how far a signal has to travel before the journey stops being the problem. If you got something out of this one, a like helps more than you would think and hitting subscribe with notification switched on means the next

26:20

Speaker A

deep dive lands in front of you. There are related videos on screen right now if you want to keep going. So here is my question for you.

26:29

Speaker A

Which bet do you think pays off bigger over the next 10 years? Making the transistors smaller or making the distance between chips disappear? Tell me in the comments.

Topics: Apple M6 2nm chip M5 Ultra TSMC gate all around nanosheet transistor Mac mini chip packaging semiconductor manufacturing FinFET

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